V62C5181024L-70W
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280,71 TL
V62C5181024
128K X 8 STATIC RAM
High-speed: 35, 70 ns
Ultra low DC operating current of 5mA (max.)
TTL Standby: 5 mA (Max.)
CMOS Standby: 60 µA (Max.)
Fully static operation
All inputs and outputs directly compatible
Three state outputs
Ultra low data retention current (VCC = 2V)
Single 5V ± 10% Power Supply
Description
The V62C5181024 is a 1,048,576-bit static random-access memory organized as 131,072 words by 8 bits. It is built with MOSEL VITELIC’s high performance CMOS process. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.
128K X 8 STATIC RAM
High-speed: 35, 70 ns
Ultra low DC operating current of 5mA (max.)
TTL Standby: 5 mA (Max.)
CMOS Standby: 60 µA (Max.)
Fully static operation
All inputs and outputs directly compatible
Three state outputs
Ultra low data retention current (VCC = 2V)
Single 5V ± 10% Power Supply
Description
The V62C5181024 is a 1,048,576-bit static random-access memory organized as 131,072 words by 8 bits. It is built with MOSEL VITELIC’s high performance CMOS process. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.
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